1. Field of the Invention
The present invention relates to apparatus for generating patterns of test signals at a tester which are fed to the unit under test by way of connection elements, or which are compared to output signals emitted by the unit under test and transmitted over the connection elements.
2. Description of the Prior Art
Units undergoing test having a multitude of electronic components, for example, card modules, must be tested for freedom from error before being built into, for example, a data processing system. To this end, the modules are tested with the assistance of a tester which generates test signals necessary for testing the unit and which checks the output signals emitted by the unit. Since, for example, large scale integrated (LSI) assemblies must also be tested with such testers, require, with such assemblies working with high speeds, that the test signals must also be generated at high speed in the tester. The test signals are either transmitted to the unit under test over connection elements, for example, terminal pins, or are compared to output signals transmitted from the unit under test to the tester over the connecting elements.